In many prior art motor control systems, pulse width modulated (or "PWM") control signals are used to provide signals indicative of the desired speed or torque of the motor. In known control systems, the PWM signal is often used to provide a signal representative of the magnitude of an analog quantity. PWM reference signals are used because they are easily generated by digital circuits, such as ASICs, microprocessors and the like, that are used in modern control systems. Furthermore, the digital nature of a PWM signal means that it can easily be passed across an isolation barrier (e.g. using optical means) with minimal corruption.
In many known current control systems, current feedback is used to maintain the desired motor current and operate the power switching circuits. In these systems, the power switches are typically operated such that the motor current is proportional to an analogue current reference signal. This reference may conveniently originate as a digital PWM signal in an ASIC or microprocessor, the required analogue voltage being obtained by low-pass filtering. One exemplary current controlled system of this type for a switched reluctance machine is illustrated in FIG. 1.
FIG. 1 generally illustrates a current control circuit for a single phase of a switched reluctance machine. As those working in the area of switched reluctance motor and control circuit design will recognize, the illustrated circuitry will typically be repeated for each phase of the machine. For the sake of clarity, not all the details of the circuit components are shown. These, however, would be readily assumed by one skilled in the art.
In the circuitry illustrated in FIG. 1, a relatively low voltage PWM current reference signal representing the desired magnitude of the peak motor phase current is received at node 10. This signal is typically generated by an ASIC, microprocessor or similar digital control circuit. In many prior art applications, the frequency of the pulses that comprise the relatively low voltage PWM current reference signal is constant, e.g., 16 kHz, and the width of the pulses is varied in proportion to the desired current. Typically, the width of the pulses comprising the low voltage PWM current reference signal is adjusted such that the average value of the PWM current reference signal (i.e., its DC component) represents the magnitude of the desired peak phase current.
The electrical components in most known motor control systems can be divided into two groups: control electronics and power electronics. The control electronics typically generate the control signals for the motor and normally operate on and from relatively low voltage signals and supplies (up to 25 Volts). Nevertheless, because of the need to couple elements of the control circuitry to the high-voltage power electronics, some of the control components may operate at high common mode voltages. The power electronics typically control the application of electric power to the motor and operate on and from voltages that may range into the hundreds of volts. In FIG. 1, the components within the broken line box comprise the power electronics and those components of the control electronics which are at high common mode voltages.
To prevent the high voltages and currents associated with the power electronics from interfering with the control electronics, and to isolate the user (who may come into contact with the control electronics) from dangerous voltages, many known circuits use elements known as "isolators", such as opto-isolators. These isolators provide a barrier between those components at high common mode potential and the remainder of the system. One such isolator is illustrated as element 15 in FIG. 1. It will be understood that means other than optical could be used, e.g. transformer isolation.
Referring to the circuitry of FIG. 1, the PWM reference signal is transmitted across the isolator 15 to the high voltage power electronics portion of the circuit. The filtering network 12 converts the PWM current reference signal into an analog voltage signal which varies in direct relation to the width of the pulses that comprise the PWM reference current signal. The analog signal from filter 12 corresponds to the peak magnitude of the desired current. That signal is applied as one input to a comparator 16. The other input to comparator 16 is a voltage taken from a first terminal of a resistor 17 that is placed in series with switching devices 8 and 23 and phase winding 24. When switching devices 8 and 23 are closed, the phase winding 24 is coupled to a power source with a voltage +V and current will flow through the phase winding 24. The voltage at the first terminal of resistor 17 corresponds to and follows the magnitude of the current in the phase winding 24.
Comparator 16 compares the voltage from filter 12 (which corresponds to the desired current) with the voltage at the first terminal of resistor 17 (which corresponds to the phase current) and generates an output signal that indicates whether the sensed phase current is greater than or less than the desired current. The output signal from comparator 16 is then transmitted back across the isolation barrier by isolator 18 and is applied as one input to a three-input AND gate 21 and as one input to a minimum off-timer 20. The minimum off-timer 20 is an electronic timing device that produces a logic low signal at its output for a predetermined period of time in response to a change in its input from a logic high value to a logic low value. After the predetermined time has passed, the output of the minimum off-timer 20 will rise to a logic high signal.
The output of comparator 16, minimum off-timer 20 and AND gate 21 operate together to control the current in the phase winding 24 as follows. When it is appropriate to energize the phase winding 24, an enable signal is provided as one input to the three-input AND gate 21. Typically, at the time the enable signal is provided, the other two inputs to the AND gate 21 will also be logic high. Accordingly, the output of logic gate 21 will be logic high. This logic high signal is then transmitted across the isolation barrier by isolator 22 and that signal turns ON switching devices 8 and 23, coupling the phase winding 24 to the power source +V. At this time the current in the phase winding 24 will begin to rise and the voltage at the first terminal of resistor 17 will begin to increase. When comparator 16 determines that the current in the phase winding is greater than the desired current, it will produce a logic low signal that, when transmitted across the isolation barrier by isolation device 18, will both render the output of AND gate 21 a logic low (thus turning off switching devices 8 and 23) and render the output of the minimum off-timer 20 logic low for the predetermined period of time. After the minimum off-timer times out (typically after 20-30 microseconds) the current in the phase winding typically will have dropped below the desired current, and the cycle will repeat during the period the enable signal for the appropriate phase is logic high.
While the known circuitry of FIG. 1 can be used to control a switched reluctance machine, it suffers from several disadvantages. For example, because of the need to isolate part of the control circuitry from the power circuitry, the control system illustrated in FIG. 1 requires three isolating devices 15, 18 and 22 for each phase of the machine. These isolation devices are often relatively expensive compared to the rest of the control system and can add undesirable cost to the motor controller. Further, because of the need to limit the chopping frequency of the switching devices 8 and 23, the circuit illustrated in FIG. 1 requires a minimum off-timer 20 or similar device. The need for an off-timer 20 for each phase also adds cost to known control systems. Still further, in control circuits like the one illustrated in FIG. 1, the switching, or "chopping", frequency is not constant, but varies with the inductance of the load 24, the supply voltage V, and (since the impedance of the load 24 will in practice have a resistive component) the actual current level. If an inaudible (ultrasonic) chopping frequency is required, as is often the case, the minimum-off periods timed by 20 must be chosen such that the lowest chopping frequency is still ultrasonic. The average switching frequency will be higher than this, and therefore the frequency-related losses in the power electronics (e.g. switching losses in switches 8 and 23) and possibly the load 24 (iron losses, skin effect in the winding) will be worse than absolutely necessary. Additionally, because the chopping frequency is not constant, but varies as the measured current and desired current vary the different phase control circuits for the individual phases in the machine can operate such that, at a given instant, the switching of the devices 8 and 23 for the different phases occurs at different frequencies. When the switching devices of the different phases are chopped at different frequencies, undesirable audible noise is often produced by the interaction or "beating" of the different chopping frequencies, even if the individual phases are all switching ultrasonically.
A further disadvantage of the circuitry of FIG. 1 is that it is subject to potentially damaging currents in the event of a failure of the digital circuit that provides the PWM signal to node 10. For example, if there was a failure in the digital device that provides the PWM signal such that the signal applied to node 10 was always at the highest logic level, the analog filter 12 would produce an analog signal corresponding to a 100% duty cycle which will ensure that the maximum phase current is provided. The application of such a high phase current for any significant length of time could damage the machine. Worse still, the failure of isolator 18, or of isolator 22 with its output in the logic HIGH state, would result in switching devices 8 and 23 being permanently closed, and the winding current consequently rising without limit.
An alternative current controller is illustrated in FIG. 2. In the control circuit of FIG. 2, as in the circuit of FIG. 1, a low voltage PWM signal representing the desired current is received at node 10 and converted by a filter 12' into a low voltage analog signal having a magnitude that varies with the duty cycle of the PWM command signal. The low voltage analog signal from filter 12' is provided to the non-inverting input terminal of a comparator 26. Also coupled to the non-inverting input terminal of the comparator 26 is a feedback signal derived from the output of the comparator 26 by feedback resistor 27. As those skilled in the art will recognize, feedback resistor 27 introduces hysteresis into the comparison, converting comparator 26 into a hysteresis comparator. The level of the hysteresis is determined by the size of resistors 27 and 29.
Coupled to the inverting input of comparator 26 is the output of a current transducer 28. Current transducer 28 is located near the phase winding 24 and provides an isolated analog voltage signal that corresponds to the magnitude of the current flowing in winding 24. The output of the comparator 26 is coupled to the control gates of switching devices 8 and 23 through an isolator 15' to control the application of voltage to the machine winding 24.
In general, the output of comparator 26 will produce a logic high signal whenever the analog voltage representing the current in the winding 24 is less than the analog voltage from filter 12' representing the desired current. Once the analog voltage representing the actual current exceeds the analog voltage representing the desired current, the output of comparator 26 will drop to logic low, opening switches 8 and 23 and allowing the machine current to drop. Once the analog voltage representing the desired voltage falls below the analog voltage representing the desired current by an amount determined by feedback resistor 27 and input resistor 29, the output of the comparator 26 will change again and the cycle will repeat.
While control circuits like the one illustrated in FIG. 2 overcome some of the limitations of circuits such as are illustrated in FIG. 1, they still suffer from several disadvantages. For example, in the circuitry of FIG. 2 the switching of switching devices 8 and 23 does not occur at any set frequency, and the switching of the devices may thus not be the same for all of the phases of a reluctance machine. As discussed above in connection with FIG. 1, these differing frequencies can result in higher than necessary switching frequencies, as well as undesirable audible noise and a switching scheme that is undesirable in that, for optimum machine control, it is desirable to be able to control the swiching of the switching devices associated with the phase windings. Still further, the circuit of FIG. 2 can suffer from the continued application of unusually high phase currents in the event that the digital device providing the PWM signal fails and provides a continuous high voltage signal to node 10. In addition, an isolated current transducer is required which, as those skilled in the art will readily recognize, is a relatively expensive item and may require considerable space for installation.
Control circuits have been suggested that allow for control of the switching frequency of the power switching devices 8 and 23. One such control system is disclosed in FIG. 3A. In the control system of FIG. 3A, as in the other systems discussed above, a PWM current reference signal is received at 10 by a filter 12" that converts the PWM current reference signal into an analog signal whose magnitude varies with the duty cycle of the PWM command signal. The analog control signal is applied to one input of an error amplifier 30. The other input to the amplifier 30 is an analog signal that constitutes the output of a low pass filter 31 that receives and averages an analog voltage corresponding to the current in the phase winding of the machine. This analogue voltage is derived from an isolated current transducer 28. The low pass filter 31 detects and averages the current flowing through the phase winding and provides an analog voltage signal corresponding to the magnitude of the current. The output of the error amplifier 30 is an analog error signal that varies with the difference between the analog signal representing the desired current and the analog signal representing the averaged measured current.
The analog error output from amplifier 30 is provided to one input of a low voltage digital comparator 33. The other input to digital comparator 33 is a repetitive low voltage waveform 34 such as a sawtooth or triangular waveform having a frequency that may be adjusted by additional control circuitry (not shown). The output of digital comparator 33 is a PWM signal whose duty cycle varies in proportion to the magnitude of the error signal from amplifier 30. This PWM signal is passed through isolator 15" to the switching devices 8 and 23.
It will be recognized by those skilled in the art that various modifications are possible to this basic circuit.
There are several disadvantages associated with the circuitry of FIG. 3A. One disadvantage is that it is slow. In particular, the need for the low pass filter 31 prevents the circuit from rapidly responding to changes in either the actual or desired machine current. Moreover, the circuit is relatively complex in that it requires the ramp signal 34 and two comparators 30 and 33. Further, it requires an isolated current transducer.
A further known current control scheme using simple current measurement and fixed switching frequency is shown in FIG. 3B. This attempts to overcome some of the difficulties associated with these schemes shown in FIGS. 1 and 2 and 3A. In this circuit, the PWM signal representing the desired current level is received at 10 and passed through an isolator 15 to a filter circuit 12 (as before). The output of the filter circuit is passed to a voltage comparator 33, the other input of which is driven by a signal from a current sensing resistor 17. The output of comparator 33 is connected to the reset input of a flip-flop 35. The set input of the flip-flop is connected to a clock signal through another isolator 37. The output of the flip-flop is used to drive the devices 8 and 23 as previously described.
At the start of a switching interval, flip-flop 35 is set by the clock signal and closes the switches building up current in the phase winding. When the load current reaches the desired value as represented by filter 12, the output of comparator of 33 resets the flip-flop, thereby opening the switches and allowing the current to fall until the next clock edge is received and the sequence repeats.
Known variants on this basic circuit have the clock oscillator inside the isolating barrier (thereby eliminating isolator 37) or use a third isolator with the flip-flop outside the barrier.
As those skilled in the art will appreciate, when the PWM duty cycle of the switching device is above 50% there is a danger that an induced error in the measured or desired current signals will increase over time and cause chaotic behavior and/or subharmonic oscillation. Slope compensation has been suggested for reducing the risk of instabilities in current controllers. Slope compensation is generally known and is discussed, for example, in UNITRODE's Application Note U-97, "Modeling, Analysis and Compensation of the Current-Mode Converter" (available from Unitrode Integrated Circuits Corp.)
However, this system still has disadvantages in that it requires a minimum of two isolators or one isolator together with a clock oscillator on the "live" side of the circuitry. Further, it requires a separate clock signal and PWM control signal, which (notably if a separate clock generator is used on the "live" side of the circuit, so as to avoid two isolators) may not be of exactly the same frequency. This may result in audible noise due to intermodulation between the clock and any residual ripple (at PWM frequency) at the output of filter 12. Nor does the circuit of FIG. 3B overcome the aforementioned problems of failure of the digital device supplying the PWM signal to node 10.
The control system of the present invention overcomes the discussed, and other, disadvantages of known control systems that receive a PWM current reference signal and provides additional benefits unavailable in the known systems. In a particular form the present invention also provides an improved current controller with slope compensation.